Title of article :
A New Low Power, Area Efficient 4-bit Carry Look Ahead Adder in CNFET Technology
Author/Authors :
Ghorbani ، Ali Department of Computer Engineering - Islamic Azad University, Najafabad Branch , Dolatshahi ، Mehdi Department of Electrical Engineering - Islamic Azad University, Najafabad Branch , Zanjani ، Mohammad ali Department of Electrical Engineering - Smart Microgrid Research Center - Islamic Azad University, Najafabad Branch , Barekatain ، Behrang Department of Computer Engineering - Big Data Research Center - Islamic Azad University, Najafabad Branch
Abstract :
In this paper, a new hybrid low-power and area efficient Carry Look-Ahead Adder in CNFET technology based on the full-swing Gate Diffusion Input (GDI) technique is proposed. The proposed CLA design in GDI logic style, not only decreases the circuit area effectively but also decreases the power consumption and delay parameters as well. The proposed design is simulated in HSPICE using the CNFET model parameters. Finally, the simulation results justify a good improvement in the circuit performance parameters such as power consumption, delay, chip size area and power-delay product (PDP) for the proposed CLA circuit.
Keywords :
Low , Power , Area , efficient , Carry Look , Ahead Adder , GDI , CNFET
Journal title :
Majlesi Journal of Electrical Engineering
Journal title :
Majlesi Journal of Electrical Engineering
