Title of article
Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic
Author/Authors
Christian Pacha، نويسنده , , Oliver Kessler، نويسنده , , Peter Glo¨seko¨tter، نويسنده , , Karl F. Goser، نويسنده , , Werner Prost، نويسنده , , Andreas Brennemann، نويسنده , , Uwe Auer and Franz J. Tegude ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2000
Pages
19
From page
7
To page
25
Keywords
resonant tunneling devices , parallel addition , threshold logic , parallel counter
Journal title
Analog Integrated Circuits and Signal Processing
Serial Year
2000
Journal title
Analog Integrated Circuits and Signal Processing
Record number
367056
Link To Document