Title of article
A CAD-Based Investigation of Clock-Skew Hazards in Pipelined NORA Dynamic Logic Circuits
Author/Authors
Fei Yuan ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
6
From page
103
To page
108
Keywords
Clock skew , NORA , CMOS circuits
Journal title
Analog Integrated Circuits and Signal Processing
Serial Year
2004
Journal title
Analog Integrated Circuits and Signal Processing
Record number
367447
Link To Document