Title of article
3-dimensional systolic architecture for parallel VLSI implementation of the discrete cosine transform
Author/Authors
Nayak، نويسنده , , S.S.; Meher، نويسنده , , P.K.، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 1996
Pages
4
From page
255
To page
258
Journal title
I E T Circuits, Devices and Systems
Serial Year
1996
Journal title
I E T Circuits, Devices and Systems
Record number
371121
Link To Document