مرکز منطقه ای اطلاع رساني علوم و فناوري - Parallel logic simulation with assignable delays on a vector multiprocessor computer

Title of article :

Parallel logic simulation with assignable delays on a vector multiprocessor computer

Author/Authors :

Jun، نويسنده , , Y.-H.، نويسنده ,

Issue Information :

روزنامه با شماره پیاپی سال 1997

Pages :

From page :

To page :

Journal title :

I E T Circuits, Devices and Systems

Serial Year :

1997

Journal title :

I E T Circuits, Devices and Systems

Record number :

371145

Link To Document :