مرکز منطقه ای اطلاع رساني علوم و فناوري - A two-level interleaving architecture for serial convolvers

Title of article :

A two-level interleaving architecture for serial convolvers

Author/Authors :

Marino، نويسنده , , F.، نويسنده ,

Issue Information :

روزنامه با شماره پیاپی سال 1999

Pages :

From page :

1481

To page :

1486

Keywords :

convolvers/correctors , pipelined architectures. , Bit serial ASICS

Journal title :

IEEE TRANSACTIONS ON SIGNAL PROCESSING

Serial Year :

1999

Journal title :

IEEE TRANSACTIONS ON SIGNAL PROCESSING

Record number :

388013

Link To Document :