Author/Authors :
Sailer، نويسنده , , P.M.، نويسنده , , Singhal، نويسنده , , P.، نويسنده , , Hopwood، نويسنده , , J.، نويسنده , , Kaeli، نويسنده , , D.R.، نويسنده , , Zavracky، نويسنده , , P.M.، نويسنده , , Warner، نويسنده , , K.، نويسنده , , Vu، نويسنده , , D.P.، نويسنده ,
Abstract :
During the past several years we have been developing technology for the creation of 3D microelectronics. Our 3D circuits are fabricated using standard bulk CMOS processing and are then transferred from one wafer to another. The transfer process allows alignment of the layers. The resulting structure consists of lower substrate and associated circuitry, with one or more thin-film circuit layers stacked on top, separated by bonding layers. We have developed an interconnection technology that allows layers to be electrically connected to one another. These interconnections are small and can be placed anywhere on the die. This unrestricted placement of interconnections gives our technology a unique advantage over other existing 3D interconnect techniques. We report our approach in this article