The Chip. A methodology for fast SPICE simulation of frequency synthesizers

Welcome to the Chip! Last year in the January issue of this magazine, the problem of simulating a sigma-delta modulator at the transistor level using SPICE was discussed and a simulation flow presented that could speed up simulation time significantly while keeping the accuracy almost intact. Transistor-level simulation is a must for optimizing the design at the final stages. In this column, we discuss a flow for the fast simulation of phase-lock loops, another widely used mixed-signal feedback system where transistor-level simulation is prohibitive. in the article, we discuss a mixed-mode methodology that uses macromodels for the digital parts while keeping the critical analog parts at the transistor level. We show that the method is effective and maintains very high accuracy