Title of article
A nanoscale memory and transistor using backside trapping
Author/Authors
Silva، نويسنده , , H.، نويسنده , , Tiwari، نويسنده , , S.، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
6
From page
264
To page
269
Keywords
Back-floating gate , CMOS device scaling , flash memories , EEPROM , nonvolatile memory , Scaling limits , silicon-on-insulator (SOI) technology , silicon–oxide–nitride–oxide–silicon (SONOS) memory , tunneling. , semiconductor memories
Journal title
IEEE Transactions on Nanotechnology
Serial Year
2004
Journal title
IEEE Transactions on Nanotechnology
Record number
398657
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