Title of article :
A BIST and Boundary-Scan Economics Framework
Author/Authors :
Jose M. Miranda، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 1997
Pages :
7
From page :
17
To page :
23
Abstract :
IC level built-in self-test and IEEE 1149.1 boundary-scan architecture offer potential benefits at all phases of a productʹs life cycle: development, manufacturing, and field deployment. During early model debugging, for example, boundary scan rapidly flushes out structural defects such as solder bridges or opens. During manufacturing test, BIST and boundary scan can improve coverage, reduce test and diagnosis time, and reduce test capital. In the field, embedded boundary-scan and BIST capabilities may facilitate accurate system diagnostics that isolate defects to individual field-replaceable units. Before investing in these design-for-testability features, however, a product development team should carefully consider their costs as well as their benefits. So far, tools for accurately evaluating these economic trade offs have not been available. At Lucent Technologies, therefore, we have developed a framework to guide a cost-benefit analysis of an investment in BIST and/or boundary scan. The framework is in its formative stages and will continue to evolve. BIST and boundary scan affect cost at all levels of product integration and during all phases of the product life cycle. This analysis framework helps developers decide if the benefits are worth the costs
Journal title :
IEEE Design and Test of Computers
Serial Year :
1997
Journal title :
IEEE Design and Test of Computers
Record number :
431142
Link To Document :
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