Title of article
Testing the Interconnect of RAM-Based FPGAs
Author/Authors
Michel Renovell، نويسنده , , Jean Michel Portal، نويسنده , , Joan Figueras ، نويسنده , , Yervant Zorian ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 1998
Pages
6
From page
45
To page
50
Abstract
Testing FPGAs before user programming can be an expensive procedure. Applying their general test configuration and test pattern generation methodology, the authors devise an efficient test procedure for the interconnect structure and demonstrate its applicability to commercial FPGAs
Journal title
IEEE Design and Test of Computers
Serial Year
1998
Journal title
IEEE Design and Test of Computers
Record number
431175
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