• Title of article

    System-on-Chip Testability Using LSSD Scan Structures

  • Author/Authors

    Kamran Zarrineh، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2001
  • Pages
    15
  • From page
    83
  • To page
    97
  • Abstract
    A technology-independent test synthesis tool extends the basic level-sensitive scan design (LSSD) boundary scan methodology. It reuses functional storage elements wherever possible and introduces minimal test logic overhead and delay
  • Journal title
    IEEE Design and Test of Computers
  • Serial Year
    2001
  • Journal title
    IEEE Design and Test of Computers
  • Record number

    431339

    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=10&DC=431339