On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz

One of the challenges of testing at multiGbps rates is jitter characterization. We introduce a new technique that allows for attaining on-chip measurements at a substantial level of accuracy. We propose new algorithms that allow a wide frequency range, supporting the desired accuracy while guaranteeing signal integrity and low overhead. One advantage of this approach is that we can reliably simulate it with a logic simulator, and the results at one frequency are indicative of the results at any frequency.