• Title of article

    A Built-In Parametric Timing Measurement Unit

  • Author/Authors

    Ming-Jun Hsiao، نويسنده , , National Tsing Hua University Jing-Reng Huang، نويسنده , , National Tsing Hua University Tsin-Yuan Chang، نويسنده , , National Tsing Hua University ، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2004
  • Pages
    9
  • From page
    322
  • To page
    330
  • Abstract
    On-chip timing-measurement units are needed because accessibility to internal nodes in SoCs is very limited, and performing time interval measurements using automatic test equipment is very difficult and expensive. We present a parametric timing measurement solution, which uses self-timed techniques and delivers high linearity and improved accuracy, at low risk of measurement error. Performing the time-to-digital conversion via built-in circuitry allows accurate measurement of short time intervals and setup/hold time. This circuitry coordinates well with low-cost ATE. To achieve this solution, researchers have used techniques such as delay matrices, phase-locked loops (PLLs), and dual-slope conversion.
  • Journal title
    IEEE Design and Test of Computers
  • Serial Year
    2004
  • Journal title
    IEEE Design and Test of Computers
  • Record number

    431512