Title of article
Enhancing Yield at the End of the Technology Roadmap
Author/Authors
Naran Sirisantana، نويسنده , , Intel Bipul C. Paul، نويسنده , , Purdue University Kaushik Roy، نويسنده , , Purdue University ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
9
From page
563
To page
571
Abstract
Scaled manufacturing technologies require advanced techniques for improving device reliability and production yield. We present a transistor-level redundancy technique for manufacturing devices with low vulnerability and improving yield in future circuits The technique relies on appropriate design style selection and controlled redundancy to achieve area and power trade-offs.
Journal title
IEEE Design and Test of Computers
Serial Year
2004
Journal title
IEEE Design and Test of Computers
Record number
431542
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