Title of article
Simultaneous Switching Noise: The Relation between Bus Layout and Coding
Author/Authors
Daniele Rossi، نويسنده , , University of Bologna André K. Nieuwland، نويسنده , , NXP Semiconductors Cecilia Metra، نويسنده , , University of Bologna ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2008
Pages
11
From page
76
To page
86
Abstract
As device geometries shrink and power supply voltages decrease, simultaneous switching noise has increasingly detrimental effects on IC reliability. The authors investigate the worst-case conditions for SSN generated by a single switching wire and analyze the impact of transition-reducing encoding on SSN. They show that switching-pattern and layout considerations have a significant impact on TRE performance.
Journal title
IEEE Design and Test of Computers
Serial Year
2008
Journal title
IEEE Design and Test of Computers
Record number
431805
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