Analysis of interfacial thermal stresses of chip-substrate structure

The interfacial thermal stresses of the chip-substrate structure near free edges play an important role in determining the reliability of electronic packaging structures. According to the heat conduction mechanism of integrated circuits, the temperature ®eld of the chip and the substrate is derived when the chip works in a steady state. A simple method is developed to determine the stress ®eld of the chip and the substrate, which can exactly satisfy the traction-free boundary conditions and continuity conditions on the interface. The corresponding stress ®eld is solved in terms of the variational principle. Finally, the e€ect of geometrical parameters of the chip and the substrate on stress concentration is analyzed in detail.