Evaluation of Router Implementations for Explicit Congestion Control Schemes

Explicit congestion control schemes use router feedback to overcome limitations of the standard mecha¬nisms of the Transmission Control Protocol (TCP). These approaches require additional packet processing in every router and therefore raise the question whether, and how, this can be achieved in high-speed routers. This paper inves¬tigates the realization complexity of these router functions of two such schemes, the TCP Quick-Start extension and the Explicit Control Protocol (XCP). Our focus lies on the implementation using a network processor. We show that synchronization issues among parallel processing entities have to be considered, and that this affects the router perfor¬mance. We develop and compare different synchronization mechanisms for highly parallel packet processing. Our prototype implementation on an Intel IXP network processor allows to quantify the impact on throughput and delay caused by the additional packet processing in the fast path. The measurements reveal that Quick-Start and XCP processing is feasible at multiple Gbit/s line speed, with Quick-Start being simpler to scale. We expect similar results for the implementation of the Rate Control Protocol (RCP), which is another router-assisted congestion control scheme, requiring no elaborate synchronization. Finally, we study the implementation using programmable logic and show the applicability of XCP and in particular Quick-Start even at significantly higher line speeds.