Memory Circuit Design in Quaternary Logic

The most widely used semiconductor memory types are the Dynamic Random Access Memory [DRAM] and Static Random Access memory (SRAM). Competition among memory manufacturers drives the need to increase the storage capacity per chip and reduce the cost per bit. A technology that has not been successfully exploited commercially is the Multilevel DRAM [MLDRAM], which offers lower cost-per-bit without the expense of retooling the DRAM manufacturing process. MLDRAM differs from conventional DRAMs by storing more than one bit per storage cell. This paper proposes and analyses a new MLDRAM sensing scheme and also analyses SRAM single cell. The accuracy of the result is validated by means of Hspice simulations with 90nm and 50nm technology to explore the applicability of the results in deep submicron technologies