An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems

Arithmetic units based on a Residue Number System (RNS) are fast and simple, and therefore attractive for use in digital signal processing and symbolic computation applications. However, RNS suffers from overheads of converting numbers to and from residue system. We present a new simple and uniform computation formula for both conversion from RNS to binary and vice versa. Two levels of parallelism for VLSI hardware design of the proposed algorithm are introduced.