Title of article
A hierarchical infrastructure for SoC test management
Author/Authors
A.، Benso, نويسنده , , S.، Di Carlo, نويسنده , , P.، Prinetto, نويسنده , , Y.، Zorian, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2003
Pages
-31
From page
32
To page
0
Abstract
HD/sup 2/BIST - a complete hierarchical framework for BIST scheduling, data-patterns delivery, and diagnosis of complex systems - maximizes and simplifies the reuse of builtin test architectures. HD/sup 2/BIST optimizes the flexibility for chip designers in planning an overall SoC test strategy by defining a test access method that provides direct virtual access to each core of the system.
Keywords
leukemia
Journal title
IEEE Design and Test of Computers
Serial Year
2003
Journal title
IEEE Design and Test of Computers
Record number
90288
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