Title of article
Optimal locations of switches and interconnections for ATM LANs
Author/Authors
Hong Suk Choi، نويسنده , , Heesoo Lee، نويسنده , , Ki-Dong Lee، نويسنده , , Sehun Kim، نويسنده , , Jong Hyup Lee، نويسنده ,
Issue Information
دوهفته نامه با شماره پیاپی سال 2001
Pages
20
From page
1347
To page
1366
Abstract
Setting up an ATM LAN with such equipment as ATM switches and cables is known to be of high price. The setup cost can be minimized with optimal design while providing the required bandwidths for all demand pairs to maintain the quality of service (QoS) requirement. In this paper, we suggest a combined optimization problem for determining optimal locations of switches, interconnections, and their capacities which can be utilized in designing ATM LAN. Two integer programming (IP) formulations are provided for the optimal network design problem. Also, the well-known Lagrangean relaxation technique is applied to solve the IP formulations. With the algorithms, we can also obtain time-efficiency as well as upper and lower bounds of the optimal objective value. To validate our design approach, various test examples are shown. High-quality solutions for ATM LANs with average error range of about 2.2% are generated.
Keywords
Lagrangean relaxation , Integer programming , ATM LAN
Journal title
Computers and Operations Research
Serial Year
2001
Journal title
Computers and Operations Research
Record number
927201
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