• Title of article

    A physical compact model of DG MOSFET for mixed-signal circuit applications- part I: model description

  • Author/Authors

    B.A.، Minch, نويسنده , , Pei، Gen نويسنده , , Ni، Weiping نويسنده , , A.V.، Kammula, نويسنده , , E.C.-C.، Kan, نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2003
  • Pages
    -2134
  • From page
    2135
  • To page
    0
  • Abstract
    To use double-gate (DG) MOSFET for mixed-signal circuit applications, especially for circuits in which the two gates are independently driven, such as in the case of dynamic-threshold and fixed-potential-plane operations, physical compact models that are valid for all modes of operations are necessary for accurate design and analysis. Employing physically rigorous current-voltage (I-V) relationship in subthreshold and above-threshold regions as asymptotic cases, we have constructed a model that joins the two operating regions by using carrier-screening functions. We have included consistently source/drain series resistance, low drain-field mobility, and small-geometry effects of drain-induced barrier lowering (DIBL), MOS interface mobility, velocity saturation and channel-length modulation (CLM) with validation from two-dimensional (2-D) distributed simulation. All model parameters can be extracted from large-signal I-V characteristics in dc conditions with given geometrical data. Parameter extraction methods and verification from simulation are presented in Part II.
  • Keywords
    hot carriers , device scaling , Flash electrically erasable programmable read-only memories (EEPROMs) , Monte Carlo simulation , programming efficiency , channel hot electron (CHE) , channel initiated secondary electron (CHISEL)
  • Journal title
    IEEE TRANSACTIONS ON ELECTRON DEVICES
  • Serial Year
    2003
  • Journal title
    IEEE TRANSACTIONS ON ELECTRON DEVICES
  • Record number

    95912