Wire space estimation and routability analysis

This paper presents a new stochastic model for two-dimensional layouts of large size. Two problems are addressed. (1) Under the condition that the number of wires emanating from a block is Poisson distributed, determine the distribution of channel width, thus estimating the average channel width. (2) Given T tracks for each channel, determine the success probability of routing an M*M cell array chip. For both problems, closed formulas are obtained. The experiment demonstrates the effectiveness of our approach. The results can be applied to gate array, field-programmable gate array design, etc.