Analysis and future trend of short-circuit power

A closed-form expression for short-circuit power dissipation of CMOS gates is presented which takes short-channel effects into consideration. The calculation results show good agreement with the SPICE simulation results over wide range of load capacitance and channel length. The change in the short-circuit power, PS, caused by the scaling in relation to the charging and discharging power, PD , is discussed and it is shown that basically power ratio, PS /(PD+PS), will not change with scaling if V TH/VDD is kept constant. This paper also handles the short-circuit power of series-connected MOSFET structures which appear in NAND and other complex gates