Title of article :
Limits to binary logic switch scaling - a gedanken model
Author/Authors :
III، Cavin, R.K., نويسنده , , V.V، Zhirnov, نويسنده , , J.A، Hutchby, نويسنده , , G.I.، Bourianoff, نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Abstract :
In this paper we consider device scaling and speed limitations on irreversible von Neumann computing that are derived from the requirement of "least energy computation." We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.
Keywords :
Closely packed devices , device scaling limits , digital integrated circuits , heat removal , Nanotechnology , power consumption , Tunneling
Journal title :
Proceedings of the IEEE
Journal title :
Proceedings of the IEEE