Characterisation of polysilicon gate microstructures for 0.5 μm CMOS devices using transmission electron microscopy and atomic force microscopy images

This paper considers two different doping methods and compares their impact on the polysilicon’s microstructures when doped with phosphorous by using the transmission electron microscopy (TEM) and atomic force microscopy (AFM) images. The two doping methods considered are the in situ (or also known as thermal diffusion) and ion implantation. For the in situ method, phosphane (PH3) with concentration of 1.8×1020 cm−3 was used while for the ion implantation, two different doses were used: 2.0×1016 and 3×1016 cm−2 at 40 keV. The surface roughness of the polysilicon microstructure obtained via the in situ method measures between 12 and 26 nm with a peak roughness of 14 nm and grain size of 4 μm. As for the ion implantation method, at lower dose the microstructure surface roughness varies from 12 to 46 nm with a peak roughness of 34 nm while the grain size measures between 100 and 200 nm. At higher dose, the surface roughness varies from 12 to 48 nm and the peak roughness measuring at 36 nm. The grain size was between 500 and 800 nm. Comparing the TEM and AFM images of the in situ method to ion implantation method reveals that the polysilicon doped by the in situ method has larger grains, smoother and thinner microstructure properties resulting in better gate morphology control.