High-performance poly-Si TFTs on plastic substrates using a nano-structured separation layer approach

We demonstrate a manufacturable, large-area separation approach for producing highperformance polycrystalline silicon thin-film transistors on flexible plastic substrates. The approach allows the use of high growth-temperature gate oxides and removes the need for hydrogenation. The process flow starts with the deposition of a nano-structured high surfaceto-volume ratio film on a reuseable "mother" substrate. This film functions as a sacrificial release layer and is Si-based for process compatibility. After high-temperature TFT fabrication (up to 1100(degree)C) is carried to completion on the sacrificial film coated mother substrate, a thick plastic top layer film is applied, and the sacrificial layer is removed by chemical attack. By using this separation process, the temperature, smoothness, and mechanical limitations posed by plastic substrates are completely circumvented. Both excellent n-channel and pchannel TFTs on plastic have been produced. We report here on p-channel TFTs on separated plastic with a linear field effect (hole) mobility of 174 cm/sup 2//V.s, on/off current ratio of >10/sup 8/ at V/sub ds/=-0.1 V, off current of <10/sup -11/ A/(mu)m-channelwidth at V/sub ds/=-0.1 V, sub-V/sub t/ swing of ~200 mV/dec, and threshold voltage of -1.1 V.