Improvement of hot-carrier-reliability by deuterium termination of Si/SiO2 interface defects

We present the improvement of hot-carrier-reliability by deuterium annealing at the temperatures ranging from 430 to 460 °C in the case of CMOS transistors of the design rule of 0.13 μm. By means of secondary ion mass spectroscopy (SIMS) and ESR measurements, we confirm that this improvement is caused by the termination of the interface defects by deuterium atoms.