Author/Authors :
Wan، Guo-Hui نويسنده , , M.، Chan, نويسنده , , Su، Pin نويسنده , , S.K.H.، Fung, نويسنده , , P.W.، Wyatt, نويسنده , , A.M.، Niknejad, نويسنده , , Huv، Chenming نويسنده ,
Abstract :
This letter provides a viewpoint for the characterization of state-of-the-art thin film silicon-on-insulator (SOI) MOSFETs. Based on body-source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devices, the concept also enables the consolidation of partial-depletion (PD) and full-depletion (FD) SOI compact models. This consolidation of compact models together with the trend of coexistence of PD/FD devices in a single chip has become one of the greatest challenges in the scaling of SOI CMOS.