Numerical simulation of strained Si/SiGe devices: the hierarchical approach

Performance predictions for 25 nm strained Si CMOS devices which are based on full-band Monte Carlo (FBMC) device simulations and which are in good agreement with the most recent experimental trends are presented. The FBMC simulator itself is part of a hierarchical device simulation system which allows to perform time-efficient hierarchical hydrodynamic (HD) device simulations of modern SiGe HBTs. As demonstrated below, the accuracy of a such a hydrodynamic-based dc, ac, transient, and noise analysis is comparable to FBMC device simulations. In addition, the new hierarchical numerical noise simulation method is experimentally verified based on a modern rf-CMOS technology of Philips Research. The MC-enhanced simulation accuracy of the hierarchical hydrodynamic and drift diffusion (DD) models can be also exploited for mixed-mode circuit simulations, which is shown by typical power sweep simulations of an industrial rf power amplifier. # 2003 Elsevier B.V. All rights reserved.