Title of article :
A 0.8-dB insertion-loss, 17.4-dBm power-handling, 5-GHz transmit/receive switch with DETs in a 0.18-(mu)m CMOS process
Author/Authors :
A.، Furukawa, نويسنده , , M.، Ono, نويسنده , , K.، Nishikawa, نويسنده , , E.، Taniguchi, نويسنده , , N.، Suematsu, نويسنده , , Y.، Yoneda, نويسنده , , T.، Murakami, نويسنده , , H.، Ueda, نويسنده , , T.، Ohnakado, نويسنده , , S.، Yamakawa, نويسنده , , J.، Tomisawa, نويسنده , , Y.، Hashizume, نويسنده , , K.، Sugahara, نويسنده , , T.، Oomori, نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
-191
From page :
192
To page :
0
Abstract :
An optimized single-pole double-throw (SPDT) transmit/receive (T/R) switch has been fabricated using depletion-layer-extended transistors (DETs) in a 0.18 (mu)m CMOS process. The switch features the highest performance to date of any switch using a CMOS process, of a 0.8 dB insertion-loss, 23 dB isolation and 17.4 dBm power-handling capability at 5 GHz. The low insertion-loss has been achieved with the effects of junction capacitance decrease and substrate resistance increase in the DET, the adoption of low-loss shielded-pads, and several layout optimizations. The high power-handling capability is owing to the combined effect of the adoption of the source/drain dc biasing scheme and the high substrate resistance in the DET.
Keywords :
heat transfer , natural convection , Analytical and numerical techniques
Journal title :
IEEE Electron Device Letters
Serial Year :
2003
Journal title :
IEEE Electron Device Letters
Record number :
99928
Link To Document :
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