DocumentCode :
14257
Title :
Clock Network and Phase-Locked Loop Power Estimation and Experimentation
Author :
William E. Higgins استاد مشاور , Mary Jane Irwin استاد مشاور , Kenneth Jenkins استاد راهنما
University :
The Pennsylvenia State University
Grade :
نامعلوم
Major :
PhD )Electrical Engineering(
Number of pages :
0
Publish Date :
2001
Keyword :
CPU clock energy modeling , Power Estimation , PLL design , low power VLSI design
Note :
01
Language :
انگليسي
Link To Document :
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