24852

Reducing Power in FPGA Designs Through Glitch Reduction

Brigham young University

نامعلوم

Electrical and Computer Engineering

0

2007

RPower , JPower , XPower , Pipelining , Retiming , energy area delay , energy metrics , probability model , transition model , FPGA , digital design , glitch reduction , Power Estimation , power reduction , activity-rate based power estimation

01

انگليسي