DocumentCode :
4569
Title :
Integrated Optimal Code Generation for Digital Signal Processors
University :
Dial Partal academic Arshive Online
Grade :
دكتري
Major :
Doctoral thesis
Number of pages :
0
Publish Date :
2006
Keyword :
Instruction-level parallelism , Integer Linear Programming , clustered VLIW architecture , architecture description language , instruction scheduling , integrated code generation , instruction selection , Dynamic programming
Note :
01
Language :
انگليسي
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=17&DC=4569