شماره ركورد كنفرانس :
3926
عنوان مقاله :
A New Approach to Operation Improvement of Differential CMOS Logic by Output Charge Path Resistance Reduction
پديدآورندگان :
Ghaderi Noushin Ghaderi.nooshin@eng.sku.ac.ir Faculty of Engineering, Shaharekord University, Shahrekord, Iran , Eslami Farsani Majid majid.eslami@stu.sku.ac.ir Faculty of Engineering, Shaharekord University, Shahrekord, Iran , Haghparasti Soroush no Email Department of Electrical Engineering, Kashan University, Kashan, Iran
كليدواژه :
Differential Static CMOS Logic (DSCL) , Embedded Differential Static CMOS Logic(EDSCL).
عنوان كنفرانس :
بيست و چهارمين كنفرانس مهندسي برق ايران
چكيده فارسي :
In this paper a structure for Differential Static CMOS Logic (DSCL) is proposed which uses two embedded transistors in a differential circuit. This structure introduces many modifications including Delay, Power, Power-delay-product (PDP), transient output current, time constant of circuit and outputs symmetry. The undesirable factors in Differential CMOS Logic are investigated and corrected. The circuits are simulated in HSPICE with 180nm technology and a 1.8v power supply. The proposed circuit demonstrates an improvement of approximately 24 percent in PDP.
