The Optimum Design of a Master-Slave D-Flip Flap (M/S-DFF) based on the modified GDI (m-GDI) Method Using Non-dominated Sorting Genetic Algorithm II (NSGA-II)

Gate diffusion input (GDI) technique provides the possibility of low power logic gates design with lower number of transistors in a simple structure. In this paper, first the modified GDI (m- GDI) cell is presented by employing carbon nano tube field effect transistor (CNTFET). Then a new configuration for master-slave Data-flip flap (M/S-DFF) is proposed based on the m-GDI cell. For optimizing the performance of the proposed M/S-DFF and gaining the minimum power and delay, the transistors size is adjusted with Non-dominated Sorting Genetic Algorithm II (NSGA-II) in MATLAB software. The circuit simulation is done with the help of H-SPICE software in 32nm CNTFET technology. Due to the achieved results of the proposed M/S-DFF simulation, the power consumption and delay decrease about 74.6% and 13.75%, respectively, in compare with similar flip flaps which aren’t optimized.