A passive switched capacitor filter employing novel timing technique to achieve higher Bandwidth

A passive low-pass switched capacitor filter is proposed which can achieve high linearity in high sampling rates. Employing a time sharing technique, the filter can be designed to realize a more arbitrary transfer function compared to previous works and hence the tunability of the filter improves. A simplified and intuitive analysis is presented to model the behavior of the filter and determine the required design parameters affecting the filter characteristics. A prototype third order filter is designed in 180nm CMOS and sampling rate of 400MHz where the bandwidth of the filter can be tuned up to 45MHz.