Author/Authors :
M.A Abazari Department of Computer Engineering - Sharif University of Technology, Tehran, Iran , M Fazeli Department of Computer Engineering - Iran University of Science and Technology, Tehran, Iran , A Patooghy Department of Computer Engineering - Iran University of Science and Technology, Tehran, Iran , S. G Miremadi Department of Computer Engineering - Sharif University of Technology, Tehran, Iran
چكيده لاتين :
This paper presents a Data Width-aware Register
file Protection (DWRP) technique to cope with Multiple Bit
Upsets (MBUs) occurring in the register file of embedded
processors. The DWRP technique has been proposed based
on the fact that there are often a significant number of bits
in the register file, which are not fully occupied by data.
The DWRP technique efficiently exploits these available
free bits for reliability enhancement purposes. In this
regard, every register is equipped with three extra tag bits
to specify the amount of available free bits in a register.
Then the appropriate parity or hamming code is used based
on the information of the tag field to protect the register file
against MBUs. The DWRP technique is extensively
evaluated on an HDL model of an ARM embedded
processor along with various MBU fault injection
experiments. Experimental results show that the DWRP
technique detects up to 99% of MBUs with average length
of 16 bits. These are achieved with negligible overheads of
7% in area and 1% in power consumption of the evaluated
processor.
