A Low-Power, 1.5V, 2.5 Gb/S CMOS Optical Receiver

A 1.5V, 2.5Gb/s analog optical receiver IC is designed in 0.18μm CMOS technology. The IC includes Transimpedance Amplifier (TIA), Limiting Amplifier (LA) along with Auto-DC-Control (ADC) to set the common-mode input voltages for succeeding circuits and to maintain an optimal biasing of cascaded amplifiers against the variations of input optical power. In order to model the real condition, a complete physical based PIN photodiode circuit model is used.In addition, the receiver has an input referred current noise of 7.8 (PA/√Hz) and the whole circuit consumes 3.69mW from a 1.5V supply.