Author/Authors
sönmez, mehmet osmaniye korkut ata üniversitesi - mühendislik fakültesi - elektrik-elektronik mühendisliği bölümü, Osmaniye, Türkiye , akbal, ayhan fırat üniversitesi - mühendislik fakültesi - elektrik‐elektronik mühendisliği bölümü, Elazığ, Turkey
Title Of Article
Design of a new BPSK modulator
شماره ركورد
40957
Abstract
In recently, the design of modulator algorithms for wireless communication systems by using digital circuits is widely realized. Moreover, it is crucial that resource utilization of the selected algorithm is reduced. In this paper, a modulator architecture which has lower RAM bit that of conventional BPSK is proposed for BPSK (Binary Phase Shift Keying) modulation technique that is used widely in wireless communication systems. The architecture can achieve to save RAM bit utilization by up to 87.5% with respect to conventional BPSK. In addition, a real-time message signal is applied on ADC (Analog to Digital Converter) which is integrated on Altera DE-0 Nano FPGA (Field Programmable Gate Array) in the paper. It is shown that proposed structure is practically realizable by achieving of message signal in output of DAC (Digital to Analog Converter) after modulation and demodulation processes.
From Page
492
NaturalLanguageKeyword
FPGA , RAM bit utilization , BPSK
JournalTitle
Pamukkale University Journal Of Engineering Sciences
To Page
496
JournalTitle
Pamukkale University Journal Of Engineering Sciences
Link To Document