DocumentCode
1000264
Title
Implementation of signal processing functions using 1-bit systolic arrays
Author
McCanny, J.V. ; McWhirter, J.G.
Author_Institution
Royal Signals & Radar Establishment, Great Malvern, UK
Volume
18
Issue
6
fYear
1982
Firstpage
241
Lastpage
243
Abstract
The use of systolic arrays of 1-bit cells to implement a range of important signal processing functions is demonstrated. Two examples, a pipelined multiplier and a pipelined bit-slice transform circuit, are given. This approach has many important implications for silicon technology, and these are outlined briefly.
Keywords
digital integrated circuits; large scale integration; multiplying circuits; signal processing; 1-bit systolic arrays; LSI; Si technology; digital integrated circuits; pipelined bit-slice transform circuit; pipelined multiplier; signal processing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19820166
Filename
4249623
Link To Document