A convergence scheme for over-erased flash EEPROM´s using substrate-bias-enhanced hot electron injection

Author

Hu, C.-Y. ; Kencke, D.L. ; Banerjee, S.K. ; Richart, R. ; Bandyopadhyay, B. ; Moore, B. ; Ibok, E. ; Garg, S.

Author_Institution

Microelectron. Res. Center, Texas Univ., Austin, TX, USA

Volume

16

Issue

11

fYear

1995

Firstpage

500

Lastpage

502

Abstract

A novel convergence scheme using substrate-bias-enhanced hot electron injection is proposed to tighten the cell threshold voltage distribution after erasure for stacked gate flash EEPROM´s. By lowering the drain voltage and increasing the magnitude of the negative substrate bias voltage, the substrate current is reduced but the hot electron gate current is enhanced significantly, and the convergence time is shown to be more than a hundred times shorter than the previous scheme. With the convergence operation performed near the ON-OFF transition region of the cells, the total drain current for all the converged cells is reduced and low power consumption is achieved.<>

Keywords

EPROM; convergence; hot carriers; integrated memory circuits; voltage distribution; cell threshold voltage distribution; convergence scheme; drain voltage; low power consumption; negative substrate bias voltage; over-erased flash EEPROM; stacked gate structure; substrate current; substrate-bias-enhanced hot electron injection; Channel hot electron injection; Convergence; Drain avalanche hot carrier injection; EPROM; Electric breakdown; Energy consumption; Hot carriers; Secondary generated hot electron injection; Substrate hot electron injection; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.468280

Filename

468280