Title :
Integrating an Electron-Beam System into VLSI Fault Diagnosis
Author :
Tamama, Teruo ; Kuji, Norio
Author_Institution :
NTT Electrical Communications Laboratories
Abstract :
Using design data, the system can prepare a logic-state map for the device under test. The map draws top-layer connections in different colors according to their expected logic states so the map may be compared to the DUT image observed by the electron-beam tester. The system has successfully tested a 75K-transistor VLSI device.
Keywords :
Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Design automation; Fault diagnosis; Integrated circuit interconnections; System testing; Very large scale integration; Wire;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.1986.294966
