Title :
A 200-V flat-panel display IC with a novel diffused-well structure
Author :
Hayama, Hiroshi ; Hirata, Kazumi ; Sakuma, Hiraku
Author_Institution :
NEC Corp., Sagamihara, Japan
fDate :
8/1/1988 12:00:00 AM
Abstract :
A high-voltage diffused-well structure that allows the low-coast fabrication of a monolithic high-voltage CMOS IC without using any epitaxial layers is discussed. Offset-gate-type PMOSTs for the proposed structure were fabricated within an n-well and a breakdown voltage over 200 V was obtained. A high-performance 200-V CMOS test IC for which high-voltage NMOSTs and low-voltage CMOS peripheral circuits were built in the p-type substrate area was fabricated. Superior latchup immunity was obtained with this structure. A 2200-pF capacitance load corresponding to that of an electroluminescent display panel was successfully driven
Keywords :
CMOS integrated circuits; flat panel displays; integrated circuit technology; power integrated circuits; 200 V; 2200 pF; CMOS peripheral circuits; CMOS test IC; NMOSTs; PMOSTs; breakdown voltage; capacitance load; diffused-well structure; electroluminescent display panel; flat-panel display IC; high voltage ICs; high-voltage CMOS IC; high-voltage diffused-well structure; latchup immunity; low-coast fabrication; n-well; p-type substrate; CMOS integrated circuits; Capacitance; Circuit testing; Displays; Electroluminescent devices; Epitaxial layers; Fabrication; Integrated circuit testing; Monolithic integrated circuits; Substrates;
Journal_Title :
Electron Devices, IEEE Transactions on
