Temperature effects on the radiation response of MOS devices

The effect of device temperature during irradiation was investigated for MOS transistors and integrated circuits over the MIL-STD temperature range, -55 to 125°C. Large, qualitative changes in transistor and 16k SRAM response are observed at both high and low temperatures. Although changes in transistor response are generally consistent with expectations, it is not always straightforward to predict circuit response as a function of temperature. For low-dose-rate (0.27 rad/s) irradiations of 16k SRAMs, the failure dose at 25°C is at least twice that at 125°C. This reduction is probably a result of a large increase in the SRAM cell imbalance. The IC failures consistently occurred at dose levels where the difference in threshold voltage between the transistors irradiated `on´ and `off´ became greater than 1.7 V. At high dose rates, large shifts in the parasitic field oxide threshold voltage caused large increases in the transistor leakage current at low temperatures