• DocumentCode
    1002544
  • Title

    Dynamic latch for high speed GaAs domino circuits

  • Author

    Nary, K.R. ; Long, S.I.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • Volume
    28
  • Issue
    1
  • fYear
    1992
  • Firstpage
    36
  • Lastpage
    37
  • Abstract
    A latch for use with GaAs domino logic gates is presented. A hybrid of a GaAs domino logic gate and a two-phase dynamic FET logic gate, the latch stores data during the precharge phase of domino logic operation. It enables the use of domino logic in large scale systems without the need for interfacing with power consumptive static latches. It is implemented with depletion mode MESFETs and dissipates 0.8 mW.
  • Keywords
    III-V semiconductors; Schottky gate field effect transistors; flip-flops; gallium arsenide; integrated logic circuits; logic gates; 0.8 mW; depletion mode MESFETs; domino circuits; large scale systems; latch; logic gates; precharge phase; two-phase dynamic FET logic gate;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19920022
  • Filename
    255908
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1002544