DocumentCode
1003026
Title
Efficient semicustom micropipeline design
Author
Gloria, Alessandro De ; Olivieri, Mauro
Author_Institution
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
Volume
3
Issue
3
fYear
1995
Firstpage
464
Lastpage
469
Abstract
We present the analytical model and the electrical characterization of a controllable delay component for a micropipeline architecture suitable for being designed with a semicustom design approach. An interesting feature of the component is that it is lockable, i.e., it can be controlled in an on/off fashion, permitting synchronous operation for testing purposes by means of an opportune architecture model.<>
Keywords
CMOS logic circuits; delays; logic design; pipeline processing; timing; analytical model; controllable delay component; electrical characterization; micropipeline architecture; semicustom design approach; semicustom micropipeline design; synchronous operation; Algorithm design and analysis; Conferences; Data structures; Energy consumption; Hardware; Industrial control; Partitioning algorithms; Power system modeling; Software tools; Yield estimation;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.407007
Filename
407007
Link To Document