DocumentCode
1003096
Title
High-Speed CAVLC Encoder for 1080p 60-Hz H.264 Codec
Author
Yi, Yongseok ; Song, Byung Cheol
Author_Institution
Digital Media R&D Center, Samsung Electron. Co., Ltd., Suwon
Volume
15
fYear
2008
fDate
6/30/1905 12:00:00 AM
Firstpage
891
Lastpage
894
Abstract
In H.264/AVC and the variants, the coding of context-based adaptive variable length codes (CAVLC) requires demanding operations, particularly at high bitrates such as 100 Mbps. This letter presents two approaches to accelerate the coding operation substantially. Firstly, in the architectural aspect, we propose component-level parallelism and pipeline techniques capable of processing high-bitrate video data in a macroblock (MB)-level pipelined codec architecture. The second approach focuses on a specific part of the coding process, i.e., the residual block coding, in which the coefficient levels are coded without using look-up tables so we minimize the pertaining logic depth in the critical path, and we achieve higher operating clock frequencies. Additionally, two coefficient levels are processed in parallel by exploiting a look-ahead technique. The resulting architecture, merged in the MB-level pipelined codec system, is capable of coding up to 100 Mbps bitstreams in real-time, thus accommodating the real-time encoding of 1080p@60 Hz video.
Keywords
adaptive codes; pipeline processing; variable length codes; video codecs; video coding; CAVLC; H.264 codec; component-level parallelism techniques; context-based adaptive variable length codes; frequency 60 Hz; high-bitrate video data processing; high-speed CAVLC encoder; look-up tables; pipelined codec architecture; real-time encoding; Acceleration; Automatic voltage control; Bit rate; Block codes; Clocks; Codecs; Frequency; Logic; Pipelines; Real time systems; Baseline; CAVLC; H264; entropy coding; intra frame mode; level coding;
fLanguage
English
Journal_Title
Signal Processing Letters, IEEE
Publisher
ieee
ISSN
1070-9908
Type
jour
DOI
10.1109/LSP.2008.2001982
Filename
4684837
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