DocumentCode :
1003137
Title :
Test structure measuring inter- and intralayer coupling capacitance of interconnection with subfemtofarad resolution
Author :
Kunikiyo, Tatsuya ; Watanabe, Tetsuya ; Kanamoto, Toshiki ; Asazato, Hironobu ; Shirota, Mitsutoshi ; Eikyu, Katsumi ; Ajioka, Yoshihide ; Makino, Hiroshi ; Ishikawa, Kiyoshi ; Iwade, Shuhei ; Inoue, Yasuo
Author_Institution :
Renesas Technol. Corp., Hyogo, Japan
Volume :
51
Issue :
5
fYear :
2004
fDate :
5/1/2004 12:00:00 AM
Firstpage :
726
Lastpage :
735
Abstract :
We present a new test structure measuring inter- and intralayer coupling capacitance parasitic to the same target interconnection with subfemtofarad resolution. The coupling capacitance as well as fringing capacitance measured by the test structure are demonstrated for two-level copper interconnections used in 90-nm technology node. In addition, we demonstrate that the accuracy of layout parameters extraction is improved by nondestructive inverse modeling of a copper interconnect cross-sectional structure, which reproduces the pitch dependence of the measured inter- and intralayer coupling capacitance within about a 1% error.
Keywords :
capacitance measurement; integrated circuit interconnections; integrated circuit modelling; optimisation; capacitance measurement; fringing capacitance; integrated circuit interconnection; interlayer coupling capacitance; intralayer coupling capacitance; monitoring; optimization method; subfemtofarad resolution; two-level copper interconnections; Capacitance measurement; Chemical technology; Copper; Coupling circuits; Delay; Integrated circuit interconnections; Inverse problems; Parasitic capacitance; Semiconductor device measurement; Testing; Capacitance measurement; integrated circuit interconnection; monitoring; optimization method;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.826899
Filename :
1303831
Link To Document :
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